MediaTek Quick to Market with Palladium [Cadence Design Systems YouTube channel, April 11, 2014]
MediaTek Gets a Jump Developing High-Quality Smart Devices [Cadence, April 10, 2014]
Taiwan-based fabless semiconductor company MediaTek is a leader in developing advanced systems on chip (SoCs) for wireless communications, HDTV, DVD, and Blu-ray, including ARM® -based systems such as the octa-core smartphone platform with LTE. The company’s corporate vice president, Andrew Chang, recently sat down with Cadence to talk about the development challenges of building advanced systems and how the company is using the Cadence® Palladium® XP II platform to help create today’s smart devices.
Cadence Expands ARMv7/v8-based system-to-silicon verification solutions [ARM SoC Implementation Blog, April 12, 2014]
Recently, Cadence Design Systems expanded its ARM-based design system verification solution in order to drive shorter time-to-market for mobile, networking and server applications. This expanded solution features several enhancements and speeds system design and early software development for ARM Cortex®-A processor series based systems including:
- New adaptable interconnect performance characterization test suite in the Cadence® Interconnect Workbench, along with AMBA Designer integration, that delivers a significant speed-up of performance analysis and verification of CoreLink CCI-400 system IP and NIC-400 design tool based systems.
- Expanded and pre-verified support of hardware-accurate OS embedded software verification using Palladium XP II platform with ARMv8 64-bit Cortex processor family Fast Models, which are now available through Cadence.
- Verification IP supporting AMBA 5 Coherent Hub Interface (CHI) protocol is the same protocol as implemented in the ARM CoreLink CCN-508 system IP and silicon proven CoreLink CCN-504 Cache Coherent Networks as used in enterprise level applications. The new Verification IP runs on all industry simulators, plus Accelerated Verification IP for Palladium XP II platforms.
Spreadtrum Adopts Cadence Palladium XP II Platform for Mobile SoC and Hardware-Software Verification [Cadence press release, April 14, 2014]
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Spreadtrum selected the Cadence® Palladium® XP II verification computing platform for system-on-chip (SoC) verification and system-level validation. Spreadtrum’s use of the Palladium XP II platform provides the opportunity to shorten time-to-market and improve verification productivity of its mobile chipset platforms for smartphones, feature phones and consumer electronic products.
“In the competitive mobile handset market, low power and time to market are critical,” said Robin Lu, VP of ASIC at Spreadtrum. “Spreadtrum was already using Cadence verification technologies including the Incisive platform. With the addition of the capabilities of the Palladium XP II platform, we now have an efficient tool to verify our low-power design, improve our overall verification productivity and shrink our development cycles.”
The Palladium XP II platform is part of Cadence’s System Development Suite, which significantly speeds up hardware and software verification. The Palladium XP II platform builds on the award-winning Palladium XP emulation technology by boosting verification performance by up to 50 percent and extending its industry-leading capacity to 2.3 billion gates. With reduced power and increased gate density, customers can now run larger payloads in a smaller footprint, reducing overall cost of ownership. For more information on the Palladium XP II platform, visit www.cadence.com/news/pxpII.
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and services is available here.
Cadence’s Palladium XP — Creating a virtual platform for Automotive IP [Cadence Design Systems YouTube channel, March 17, 2014]
Cadence Launches Palladium XP II Verification Platform and Enhanced System Development [Cadence feature story article, Sept 10, 2013]
Shorten Time to Market By Up to Four Months
Cadence has unveiled its Palladium® XP II Verification Computing Platform, which delivers a 2X increase in verification productivity and up to four months faster time to market. The platform is a part of the enhanced Cadence® System Development Suite, which features expanded core system and system-on-chip (SoC) verification use models and new use models for hardware/software verification.
Patent-pending hybrid technology combines the Cadence Virtual System Platform with the Palladium XP series to deliver up to 60X speed-up for embedded OS verification and 10X performance increase in hardware/software verification.
According to Kent Goodin, executive vice president of engineering at Zenverge, “The Palladium XP II platform truly allows our software teams to develop production-worthy code prior to the IC’s mask release and arrival of the prototype. This has allowed Zenverge to engage with customers at least six months earlier than would be possible without the co-development aspects of the Palladium XP II emulation solution.”
The Palladium XP II platform supports design configurations with capacity of up to 2.3 billion gates, up to 512 concurrent users, and up to 50 percent performance improvement for SoC verification. What’s more, the platform extends the support of the Cadence Accelerated Verification Intellectual Property (AVIP) portfolio to include PCIe, SRIOV, Ethernet, AHB, APB, HDMI, DSI, CSI, I2C, SimCard, and Keypad. Coupled with the existing AVIP portfolio, the Palladium XP series further extends its support for applications such as mobile Internet devices, computing, networking, processors, and audio/video.
By facilitating the high-speed transfer of interface traffic through a design under test in the Palladium XP II platform, AVIP allows you and your team to gain a substantial boost in verification performance of designs at any integration level: IP, subsystem, SoC, and system.
Understanding the increasing need for early, fast, and accurate hardware/software verification, Cadence has expanded the capabilities of our System Development Suite centered around the Palladium XP platform. Benefit from:
- Patent-pending hybrid technology that combines the Cadence Virtual System Platform with the Palladium XP series to deliver up to 60X speed-up for embedded OS verification and 10X performance speed-up for hardware/software verification
- The embedded testbench for advanced virtualization of system environments, which lets you verify peripheral software drivers before tapeout, so you can achieve faster post-silicon bring-up